FERA FIFOs

1. FERAFIFO1 and FERAFIFO2 are accessible in read and write mode if the MCR bit 0 is set.
2. FERAFIFO1 and FERAFIFO2 are not accessible in read and write mode if the MCR bit 0 is cleared. Only the FERA readout and the GIR readout can write and read the FIFOs.