FPGA Programming It is possible to transfer FPGA programs to the RAM of the core and segment modules and hence to reprogram the FPGAs. It is not currently possible to rewrite the flash memories within the digitizers and so any reprogramming is temporary and can be reversed by power cycling the digitizer. Options available core bitstream => core control RAM and core module core segment bitstream => core control RAM, segment control RAM, core module segments and segment module segments core control RAM => core module core and core module segments segment control RAM => segment module segments (A) To transfer a FPGA program from computer disc to digitizer RAM. Source: Here select the source of the bitstream to be copied. This will be either a "core bitstream" or "segment bitstream". Bitstream filename: The file must be accessible to the server software. Hence it is required that any file to be loaded into the digitizer be in a standard location. By default this is the directory /MIDAS/TclHttpd/Html/AGATADigitizer/Bitstreams. The pulldown menu will contain all .bit files found in this directory. If you have recently copied a new file into the directory and it does not show in the menu use the "Reset" button and the server will rescan the directory. Destination: Here select the destination for the bitstream being copied. This will be either "core control RAM" or "segment control RAM" Execute download task This causes the copy task to be executed. You will be asked to confirm the operation about to take place. WARNING: Typically it takes 2-3 minutes to perform the copy task and you should not touch the systems while this is happening. WARNING: The copy task runs as a standalone program. The digitizer control system releases the ethernet (Xport) connection in order to allow the copy task to run. Do not cause any accesses to the digitizer from the control system while the copy is in program. The digitizer control system will reconnect as soon as the copy task completes. WARNING: A "core bitstream" should only be copied into the "core control RAM". A "segment bitstream" may be copied into both the "core control RAM" and the "segment control RAM" The software makes some checks but it is not possible to check that the bitstream file you select really is the type you claim. Be careful!! (B) To program a FPGA with a bitstream image previously copied to digitizer RAM. Source: Here select the source of the bitstream image. This will be either "core control RAM" or "segment control RAM" Bitstream filename: Not used. Destination: Here select the FPGA to be programmed. This will be either "core module core", "core module segments" or "segment module segments" Execute download task This causes the copy task to be executed. You will be asked to confirm the operation about to take place. The bitstream file in the "core control RAM" may be either a "core bitstream" in which case it can be copied into a "core module core" or it can be a "segment bitstream" in which case it can be copied into a "core module segment". The bitstream file in the "segment control RAM" may only be a "segment bitstream" in which case it can only be copied into a "segment module segment". NOTE: This is a relatively quick operation. (C) To take a FPGA program from computer disc and use it to program a FPGA. This is a combination of (A) and (B). The FPGA program will first be copied into the appropiate mode RAM and then used to program the FPGA. You will be asked to confirm the operations about to take place. Source: Here select the source of the bitstream to be copied. This will be either a "core bitstream" or "segment bitstream". Bitstream filename: The file must be accessible to the server software. Hence it is required that any file to be loaded into the digitizer be in a standard location. By default this is the directory /MIDAS/TclHttpd/Html/AGATADigitizer/Bitstreams. The pulldown menu will contain all .bit files found in this directory. If you have recently copied a new file into the directory and it does not show in the menu use the "Reset" button and the server will rescan the directory. Destination: Here select the FPGA to be programmed. This will be either "core module core", "core module segments" or "segment module segments" Execute download task This causes the copy task to be executed. You will be asked to confirm the operation about to take place. WARNING: Typically it takes 2-3 minutes to perform the copy task and you should not touch the systems while this is happening. WARNING: The copy task runs as a standalone program. The digitizer control system releases the ethernet (Xport) connection in order to allow the copy task to run. Do not cause any accesses to the digitizer from the control system while the copy is in program. The digitizer control system will reconnect as soon as the copy task completes. WARNING: A "core bitstream" should only be copied into the "core module core". A "segment bitstream" may be copied into both the "core module segments" and the "segment module segments" The software makes some checks but it is not possible to check that the bitstream file you select really is the type you claim. Be careful!! NOTE: The standard digitizer control firmware causes the LED displays on the rear of the digitizer modules to show a changing pattern of leds. The firmware for the Samwise program (See below) causes the LED display to show an alternating off/on pattern. NOTE: Since any firmware change is only loaded into the dynamic RAM of the Virtex FPGAs you can revert to the standard firmware by power cycling the digitizer. Digitizer System Test The Samwise program is a standalone program used to test the data acquired by a digitizer. The Samwise program uses both the Core and Segment ethernet (Xport) connections. The digitizer control system uses only the core connection. This function enables the Segment ethernet (Xport) for Samwise operation. The Xport hardware only supports 1 connection. In order to allow Samwise to use the Core ethernet (Xport) connection this function closes the digitizer control system connection. NOTE: To program the digitizer for Samwise operation you will need to 1) load a SAMWISE core bitstream firmware into the core module core 2) load a SAMWISE segment bitstream fileware into the core module segments 3) load a SAMWISE segment bitstream fileware into the segment module segments the file for steps (2) and (3) may be the same but it does have to be loaded into the digitizer twice (since to goes into different RAMs) NOTE: The digitizer control system will attempt to connect to the digitizer ethernet (core Xport) if any request is generated and the connection is not already active. So while using Samwise be careful not to cause any accesses to the digitizer from the control system.