This is the channel Charge Sensitivity register which is DPP_CTRL  0x1n80 bits [2:0]

Charge Sensitivity
 defines how many LSB are thrown away (ie right shift) before the charge is saved into the memory buffer;
this corresponds to a division by 2^n


000:   20fc/LSB  (n=1)
001:   40fc/LSB  (n=2)
010:   80fc/LSB  (n=3)
011:  160fc/LSB  (n=4)
100:  320fc/LSB  (n=5)
101:  640fc/LSB  (n=6)