| Register |
[namespace eval V1730PHA {
set html ""
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "n=$i | "
}
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Dynamic Range (0x1n28) | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.DynRnge] | "
}
append html "
"
append html ""
append html "| Channel n Algorithm Control (0x1n80) | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.AlgorithmControl] | "
}
append html "
"
append html ""
append html "| Channel n Local Trigger Management (0x1nA0) | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.LocalTrigger] | "
}
append html "
"
append html ""
append html "| Channel n Rise Time (0x1n58) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.InputRiseTime] | "
}
append html "
"
append html ""
append html "| Channel n Averaging Window (0x1n54) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.AvWindow] | "
}
append html "
"
append html ""
append html "| Channel n Decay Time (0x1n68) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.DecayTime] | "
}
append html "
"
append html ""
append html "| Channel n Dynamic Range (0x1n28) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.DynRnge] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Trapezoid Rise Time (0x1n5c) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.TrapRiseTime] | "
}
append html "
"
append html ""
append html "| Channel n Trapeziod Flat Top (0x1n60) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.TrapFlatTop] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Threshold (0x1n6c) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.Threshold] | "
}
append html "
"
append html ""
append html "| Channel n Peaking Time (0x1n64) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.PeakingTime] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n RT Validation Window (0x1n70) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.RTDWinWidth] | "
}
append html "
"
append html ""
append html "| Channel n Trigger Hold Off (0x1n74) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.TrigHoldOff] | "
}
append html "
"
append html ""
append html "| Channel n Peak Hold Off (0x1n78) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.PeakHoldOff] | "
}
append html "
"
append html ""
append html "| Channel n Baseline Hold Off (0x1n7c) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.BaseLineHoldOff] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Pre Trigger (0x1n38) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.PreTrig] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Trig Val Mask (0x81nm) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.TrigValMask] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Num Events per buffer (0x1n34) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.EvtsPerBuf] | "
}
append html "
"
set html
}]
[namespace eval V1730PHA {
set html ""
append html ""
append html "| Channel n Status (0x1n88) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.Status] | "
}
append html "
"
append html ""
append html "| Channel n AMC FPGA Firmware Revision (0x1n8c) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.FPGARev] | "
}
append html "
"
append html ""
append html "| Channel n DC Offset (0x1n98) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.DCOffset] | "
}
append html "
"
append html ""
append html "| Channel n ADC Temperature (0x1na8) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.ADCTemp] | "
}
append html "
"
append html ""
append html "| Channel n Input Dynamic Range (0x1n28) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.DynRnge] | "
}
append html "
"
append html ""
append html "| Channel n Trapezoid Baseline Offset (0x1nc0) | "
# append html " | "
for {set i 0} {$i < $NumChans} {incr i} {
append html "[ReadRegister Ch$i.TrapBaseOffset] | "
}
append html "
"
set html
}]
| FirmWare License (0x8158) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister FirmWareLicense] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| ROC FPGA Firmware Revision (0x8124) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister FPGARev] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Channel Configuration (0x8000) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister Config] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Buffer Organization (0x800c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister BufferOrg] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Acquisition Control (0x8100) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister AcqControl] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Acquisition Status (0x8104) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister AcqStatus] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Trigger Source Enable Mask (0x810c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister TrigSrcEnable] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Front Panel Trigger Out Enable Mask (0x8110) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister FPTrigOutEnable] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Acquisition Window Size (0x8020) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister RecLen] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Front Panel I/O Data (0x8118) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister FPIOData] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Front Panel I/O Control (0x811c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister FPIOControl] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Channel Enable Mask (0x8120) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister Enable] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Set Monitor DAC (0x8138) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister MonitorDAC] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Board Info (0x8140) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister BoardInfo] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Monitor Mode (0x8144) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister MonitorMode] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Event Size (0x814c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister EventSize] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Run Delay (0x8170) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister RunDelay] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| External Trigger Disable (0x817c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister ExtTrigDisable] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Board Fail Status (0x8178) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister BoardFailStatus] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Channel Shutdown (0x81c0) |
[namespace eval V1730PHA {
set html ""
# append html "[ReadRegister ChShutdown] | "
append html "0xdead | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Fan Speed Control (0x8168) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister FanSpeed] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Memory Buffer Almost Full Level (0x816c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister MemBufFWM] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| VME Control (0xef00) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister VMEControl] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| VME Status (0xef04) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister VMEStatus] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Max Events per BLT (0xef1c) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister BLTEventNum] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
| Scratch Register (0xef20) |
[namespace eval V1730PHA {
set html ""
append html "[ReadRegister Scratch] | "
for {set i 1} {$i < $NumChans} {incr i} {
append html " | "
}
set html
}]
[namespace eval V1730PHA {
set html ""
for {set i 0} {$i <= 0x50} {incr i 4} {
append html "| Configuration ROM 0x[format %02x $i] | "
append html "[ReadRegister ConfigROM[format %02x $i]] | "
for {set j 1} {$j < $NumChans} {incr j} {
append html " | "
}
append html "
"
}
for {set i 0x80} {$i <= 0x88} {incr i 4} {
append html "| Configuration ROM 0x[format %02x $i] | "
append html "[ReadRegister ConfigROM[format %02x $i]] | "
for {set j 1} {$j < $NumChans} {incr j} {
append html " | "
}
append html "
"
}
set html
set html "" ;# disable
}]