Trigger Hold Off: During the trigger hold-off time no further triggers are accepted. This option is normally used to prevent the overshoot at the output of the timing filter from re-arming the trigger logic. The trigger hold-off time is expresssed in steps of 8 sampling periods.
This is the register DPP_TRG_HOLD_OFF (Ttrgho)


Trigger Hold‐Off Width (0x1n74, 0x8074 , R/W, I)
The Trigger Hold‐Off is a logic signal of programmable width generated by a channel in correspondence with its local self‐ trigger. Other 
triggers are inhibited for the overall Trigger Hold‐Off duration
Bit Description
[5:0] Set the Trigger Hold-Off width in steps of 8 times the sampling
     clock unit (10 ns). Triggers are inihibited for the overall Trigger
    Hold-Off duration.
[31:6] Reserved