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\noindent
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{\large {\bf Data Acquisition}}\\[2mm]
Event Manager EM4
}}\\[7mm]
\makebox[2.5cm][l]{Author:} P.M. Simmons\\[2mm]
\makebox[2.5cm][l]{Date:} 4 April 1993\\[2mm]
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~ & ~ \\ \hline
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\begin{center}
{\Large A Note on the Proposed Changes to EM4}
\end{center}

\section {Introduction}

It is proposed that the method of event transfer between EM4 and the GEC emulator will be changed to remove the bottleneck caused by the serial link. Instead the faster transfer rates possible using a FERA link straight into VME will be exploited. This method of transfer will also reduce the load on the GEC emulator allowing it to spend more time in online sorting. To achieve this the Read and Store module will be replaced by a Star Burst Module (SB). The SB is programmable in either BASIC or Assember language to interact with CAMAC modules. This note will first describe the current system and the form of the data header and hitwords, and will then outline the proposed changes.

\section {Current System}

The current system can cope with up to 128 channels. To do this it uses an Event Control Manager (ECM) to do a FERA read of all of the ADC's. Data meeting the criteria:
	\begin {itemize}
	\item Data $>$ threshold set by software in ECM
	\item Overflow bit (16) not set
	\end {itemize}
is moved by the ECM onto a Data Stack (DS), again using FERA. The ECM then constructs the ADC part of the hit pattern which is written to the trigger panel. This allows the user to select which other channels are to be read, passing the information back by the ECM to construct the full header. The Read and Store Module (RSM) reads in the header. The bit pattern is used to perform CAMAC reads of the data from the DS, the selected TDC's and additional CAMAC channels. The full event is added to a 2k Byte internal stack. When this stack becomes full a second RSM buffer takes over while the data is transferred to VME using a serial link controlled by a Serial Link Controller module.

\section {The Current Header Word}

\begin {tabular} {|c||c|c||c|c|c|c|c||c||c|c|c|c|c|c|c|} \hline
1 & TL & $\rightarrow$ & $\leftarrow$ & $-$ & $trigger\above 0pt type$ & $-$ & $\rightarrow$ & M & $\leftarrow$ & C & O & U & N & T & $\rightarrow$  \\  
\hline
\end {tabular}\\

\noindent Where TL is the number of hit words, and the maximum data length is 64 channels, denoted by the count bits which give the length of the record including the header, hit words and data. The M bit denotes more data to follow in a separate block.

\section {The Proposed New System}

The RSM will now be replaced by a SB controller. As mentioned before this unit is programmable and has the ability to communicate using CAMAC commands. Its role will be to construct the event within the DS, which will be linked straight into VME via a FERA link. The ECM will deal with the ADC's and produce the header in the same way as currently, however before the data is written to the DS the SB will increment the DS write pointer to leave enough room for the header and hit words.

The ECM will pass the header and hit words to the SB, through sucessive F(0).A(1) CAMAC reads, these will be used to read the selected TDC's and additional CAMAC channels. This data will be read into the SB and held in an array until all channels have been read. Upon completion of this process, the SB will write the data onto the DS above the ADC data. The SB will reset the DS write pointer to zero, allowing it to write the header and hit words onto the start of the event. Once the full event has been constructed within the DS a FERA/VME unit will transfer it to a 2M Byte VME store ready to be read by the GEC emulator. Like the RSM the FERA/VME unit will be duplicated allowing for flip-flop operation.

\section {Hardware and Header / Hitword Modifications}

\begin {itemize}
\item Changes will need to be made to the Event Controller so that the Star Burst can read out the header and hit word in CAMAC. It is proposed to do this via a machine gun read using an F(0).A(1). This still presents a problem as currently data is read out in two blocks each having its own header and hit words. There are two possibilities for the new scheme, both of which allow for a maximum of 512 channels. These are:

\begin {enumerate}
\item The first bit, now always `1' can be included in the TL, and the more bit can be included in the count bits. Later modifications could also use the 24/25 bits to give TL and count information.

\begin {tabular} {|c|c|c||c|c|c|c|c||c|c|c|c|c|c|c|c|} \hline
$\leftarrow$ & TL & $\rightarrow$ & x & x & x & x & x & $\leftarrow$ & C & O & U & N & T & $-$ & $\rightarrow$   \\  
\hline
\end {tabular}

\item The current system is still used but all of the headers and hit words are placed at the start of the event instead of being embedded within the data.

\begin {tabular} {|c|c|c||c|c|c|c|c||c||c|c|c|c|c|c|c|} \hline
1 & TL & $\rightarrow$ & $\leftarrow$ & $-$ & $trigger \above 0pt type$ & $-$ & $\rightarrow$ & M & $\leftarrow$ & C & O & U & N & T & $\rightarrow$ \\  \hline
\multicolumn{16}{|l|}{hit words}   \\ 
\hline
1 & TL & $\rightarrow$ & $\leftarrow$ & $-$ & $trigger \above 0pt type$ & $-$ & $\rightarrow$ & M & $\leftarrow$ & C & O & U & N & T & $\rightarrow$ \\   \hline
\multicolumn{16}{|l|}{hit words}   \\ 
\hline
\multicolumn{16}{|l|}{data}   \\ 
\hline
\end {tabular}
\end {enumerate}

\item A method will need to be devised to indicate a clogging situation within the FERA/VME Store. 

\item Lastly it will be necessary to indicate that a new event can begin. This is currently produced by the RSM but will now be dependant on the Data Stack. A likely solution to this last problem would be for the SB to look at the Data Stack read pointer, when this gets to the end of the event the SB can then signal that EM4 is ready for a new event.
\end {itemize}
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