\documentstyle[11pt,a4wide]{article}
\title{Use of VXI lines in First Phase of Eurogam}
\author{Ian Lazarus}
\date{March 1990}
\begin{document}
\maketitle
\section{Introduction}
The first implementation of Eurogam will be a simplified `Common Deadtime'
approach which will have simpler requirements than the full pipelined system
which will also allow processing of events in parallel. The allocation of VXI
lines in section 2 will be different from the pipelined allocation, but the
variations will be as few as possible. 
 
The lines marked \dag\/ are those whose function will be changed for the
pipelined version of Eurogam.
 
This list is based on Euroball discussions and in particular the list of VXI
pin assignments dated 19-March-1990 produced by Christoph Ender.
 
\newpage
\section{VXI lines}
\subsection{Local Bus}
\begin{itemize}
\item 1 REN daisy chain for readout (VME or Local Bus) [TTL or ECL]
\item 2 Bussed inspection lines [Analogue 0 to 5V]
\item 33 Unused lines available for 32 bit readout plus Strobe if required.
[ECL] \dag
\end{itemize}
\subsection{ECLTRG 0-5}
\begin{itemize}
\item 1 Token return (at the end of readout; VME or Local Bus) 
\item 1 Event Reject (From Trigger Unit) \dag
\item 1 Validation (From Trigger Unit) Also initiates readout.
\item 3 Reserved for pipelined operation
\end{itemize}
\subsection{TTLTRG 0-7}
\begin{itemize}
\item 4 Event Identifier (For readout synchronisation from multiple crates)
\dag
\item 1 Transfer all scalers to shadow registers, and reset scalers.
\item 1 Halt system temporarily.
\item 2 Reserved for pipelined operation
\end{itemize}
\subsection{STAR lines}
\begin{itemize}
\item STARX used for distribution of fast trigger pulse from trigger unit.
\item STARY reserved for pipelined operation
\end{itemize}
\subsection{SUMBUS}
Analogue current sum. Buffered out via slot 0 to trigger unit.\\
N.B. Voltage clamped to $\pm3$~V,
terminated in two 50$\Omega$ resistors so maximum current is 120mA per crate.
This implies that in the worst forseeable case 
for a full crate of 11 BGO cards, each 32 channels, with all channels active
during testing we can safely allow 0.25mA/channel.
\subsection{Clocks}
The VXI backplane distributes CLK 10, CLK100 and SYNC100 to all slots.
\subsection{MODID}
All boards will respond to MODID lines as required by the VXI Specification.
\subsection{VME}
An A24D32 VMEbus system will be used for setup and possibly for readout.
\end{document}