GREAT Data Format: Version 3.1.3

Version 2.0

This proposal reduces the GREAT data word size from 48 bits to 32 bits. It is further proposed that this format is used in the interface between the Event collector, and the Event Sorter.

The information that is lost in this change is the top 20 bits of the timestamp. There is a SYNC information event, transmitted from each ADC module every 655uS, which consists of all 48 bits of the Timestamp. The Timestamp sent with every event consists of 28 bits ( 2²⁸ => 2.7 seconds ), this overlaps with 4096 SYNC pulses. The probability of a data error in the time being undetected is very small.

The flow control between the ADC card and the SHARC  require particular types of timestamp to be transmitted from the ADC to indicate the Pause, and Resume states of the ADC card.

The following format is proposed to meet these existing requirements, and to allow future flexibility.

Version 3.1

Addition of a data structure to handle ADC Sample Buffers from the SAGE/LISA LyrTech modules.
Addition of information word to handle TimeStamp information from SAGE/LISA LyrTech Modules. This is similar to the SYNC100 TimeStamp except that the information originates within the LyrTech ADC module firmware and will not have the same strict periodic nature as the SYNC100 information. Data within an output stream can however be assumed to be time ordered.

Note that while all data items occupy 64 bits and hence are aligned on a 64 bit boundary they are generated as 2 32 bit data words. This is important when considering byte ordering.

Add layout of bits within Channel Ident field. Add Sequence Number Information Item.

Add additional Information Codes.

Additions for use with Aida (FEE64 modules).

All ADC channels send 64 bits of data via the SHARC link for each ADC conversion, in two 32 bit words. The same format is used for the computed energy from the Lyrtech digitial ADCs. These two words are formatted as follows.

ADC Data Format

  

31	30	29	28	27 to 16					15 to 0
1	1	Fail	Veto	Channel Ident					ADC data
31 to 28				27 to 0
0				Time Stamp 27:0

For the Aida fee64 module the Fail bit is currently not used. Will be 0.
The Veto bit (bit 28) will contain the ADC Range setting: (0 = low; 1 = high).

The Lyrtech digitial ADCs may also generate a data buffer containing the ADC sample data. This is sent as a 64 bit header in two 32 bit words followed by n samples where each sample is a 16 bit data item. These words are formatted as follows.

Sample Trace Buffer Format

  

31	30	29	28	27 to 16					15 to 0
0	1	0	0	Channel Ident					sample length
31 to 28				27 to 0
0				Time Stamp 27:0

The "sample length" defines the number of 14 bit sample data items following and will be a multiple of 4.
These data items follow in the following format.

  

0	0	Sample n (14 bits)	0	0	Sample n+1 (14 bits)
0	0	Sample n+2 (14 bits)	0	0	Sample n+3 (14 bits)

Note that for normal data the 2 most significant bits of each 16 bit sample word will be zero. However the header does contain the number of samples. This should be used when processing the data since for diagnostic purposes the raw data from the hardware may be passed by this path and this may contain data in which the 2 most significant bits are used. This diagnostic information is likely to be removed before the data stream is written to final storage.

Channel Ident format (VXI modules) (12 bits)

11 to 5							4 to 0
VXI Module Number							Adc Number

Channel Ident format (Lyrtech modules - ADC item) (12 bits)

11 to 5							4	3 to 0
VHSADC Module Number							0=energy; 1=baseline	Adc Number

Channel Ident format (Lyrtech modules - Sample item) (12 bits)

11 to 5							4	3 to 0
VHSADC Module Number							0=trace data; 1=raw data	Adc Number

Channel Ident format (Aida fee64 modules) (12 bits)

11 to 6							5 to 0
FEE64 Module Number							Channel Number

All other Information is sent in the following format

  

31	30	29 to 24				23 to 20				19 to 0
1	0	Module Number				Information Code				Information Field
31 to 28				27 to 0
0				Time Stamp 27:0

The Module number identifies the source of the information. This will be an ADC VXI card or Lyrtech ADC module.

Information code will be able to identify one of 16 possible information words. The information Field is defined for each of the codes.

The Information codes identified are as follows

Information Type	Code	Information Field Definition
Undefined Data	0
ADC Channel Pile-Up	1	Channel Number
Pause TimeStamp	2	Timestamp bits 47:28
Resume TimeStamp	3	Timestamp bits 47:28
SYNC100 TimeStamp	4	Timestamp bits 47:28
Extended Item TimeStamp	7	Timestamp bits 47:28
Scanning Table Information	8	information index (16-19) + data (0-15)
Aida fee64 discriminator data	8	fee64 discriminator data
ADC Channel/Energy Over-Range	9	Channel Number
ADC Channel/Energy Under-Range	10	Channel Number
ADC Channel Overflow	11	Channel Number
ADC Channel Underflow	12	Channel Number
Trigger Sequence Number (event number)	13	module sequence number
Data Link Statistics	14	Link Number. Transfer between Sender and Receiver. Timestamp is replaced by a buffer count
SHARC Link number	15	Link Number. Transfer between SHARC and Receiver. Timestamp is replaced by a buffer count